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January 2021 Newsletter

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Happy New Year to all IXPUG members. We have some exciting 2021 activities coming up soon. Read on for details and important links to 2020 sessions available for replay.

Events

HPC Asia 2021

Join us live online for the IXPUG Workshop at HPC Asia 2021 with keynote “Advancing HPC Together” January 22, 2021 (Korean Standard Time, GMT+9). The full agenda for this open workshop includes invited talks and contributed papers on high-performance computing applications, systems, and architecture with Intel technologies. We are pleased to bring together software developers and technology experts to share challenges, experiences and best-practice methods for the optimization of HPC, Machine Learning, and Data Analytics workloads on Intel® Xeon® Scalable processors, Intel® Xeon Phi™ processors, Intel® FPGA, and related hardware/software platforms. The workshop will cover application performance and scalability challenges at all levels – from intra-node performance up to large-scale compute systems. As always, IXPUG encourages an open forum, and we look forward to your participation in Q&A. The conference is free to attend, but registration is required.

SC20

Replay IXPUG’s SC20 session Accelerating Code Development with Intel OneAPI on Intel XPUs.* The session highlights community activities to prepare for the use of Intel XPUs (GPUs, FPGAs) in large systems; e.g, oneAPI for Aurora and the science driving the work. Programming for heterogeneous platforms containing XPUs using the Intel oneAPI programming framework is the central topic. This builds on IXPUG community work in preparing codes for the parallelism of Intel CPUs and Xe hardware. Experts from Zuse Institute Berlin, Argonne National Laboratory, and Intel Corporation share plans, priorities and early experiences with oneAPI.

Download the slides HERE. *Replay available if you registered for SC20.

IXPUG Annual Conference

We loved connecting IXPUG members and new contributors through the IXPUG Annual Conference 2020…the keynotes “The Landscape of Modern Parallel Programming Using Open Standards” and “How HPC Developers Using SYCL Need to Deal with Data Movement” by Michael Wong (Codeplay) and the entire 4-day program are available to replay (also slides to download) as individual sessions. Check out your topics of interest and share with colleagues. It was great to see all the positive feedback, live Q&A and conversation via the Slack channel, and community participation making it a successful first IXPUG virtual event.

Resources

Webinars and Podcasts

  • Live Webinar Thursday, February 18 | 8:00–9:00AM PT: Migrating from CUDA-only to Multi-Platform DPC++ – Steffen Christgau, research associate in the Algorithms for Innovative Architectures research group of the Supercomputing Department at the Zuse Institute Berlin, will demonstrate how an existing CUDA stencil application code can be migrated to DPC++ with the help of the Compatibility Tool. We will highlight and discuss the crucial differences between the two programming environments in the context of migrating the tsunami simulation easyWave. The discussion also includes steps for making the code to compliant with the SYCL standard. During the talk, we will also show that the migrated code can run on a wide range of platforms starting from CPUs, over GPUs, to FPGAs. Marius Knaust (ZIB) will join to answer FPGA-related questions from the audience.
  • Podcast: At the OpenMP Forefront – Bronis de Supinski, CTO of Livermore Computing at Lawrence Livermore National Lab and Chair of the OpenMP Language Committee, discusses what’s coming in 5.1 and beyond, how the C++ ecosystem is evolving, and why Python in HPC
  • Podcast: A Proving Ground for Open Standards – Andrew Lumsdaine, Chief Scientist at Northwest Institute for Advanced Computing, discusses how parallelism and heterogeneity are hand-in-glove for achieving performance, underscores the value of open standards, and provides ways developers can shape ISO C++, SYCL, DPC++, and oneAPI.
  • Podcast: In Pursuit of the Holy Grail: Portable, Performant Programming – Dr. Tom Deakin, senior research associate in the HPC Research Group at University of Bristol, discusses performance portability, SYCL, hipSYCL, and DPC++.
  • What technologies do you want to learn more about in 2021? Drop us a note at This email address is being protected from spambots. You need JavaScript enabled to view it. anytime—we want to hear from members!

ABOUT IXPUG

  • IXPUG is an independent users group whose mission is to provide a forum for the free exchange of information that enhances the usability and efficiency of scientific and technical applications running on HPC, AI, and data analytics systems using advanced Intel technologies. IXPUG is administered by representatives of member sites that operate large Intel-based HPC systems.
  • IXPUG activities are run by an elected Leadership Board. IXPUG Leadership Board elections take place in January, and officers serve for two years. If you are interested in serving on the IXPUG Steering Committee, please contact us! For more information, see the IXPUG Charter or contact This email address is being protected from spambots. You need JavaScript enabled to view it..
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