IXPUG Annual Spring Conference 2017
Location: The Stephen Hawking Centre for Theoretical Cosmology (CTC) at the University of Cambridge, UK
Centre for Mathematical Sciences, Wilberforce Road, Cambridge CB3 0WA, United Kingdom
Date: April 10, 2017: Intel PCC Members Only [closed session, by invite only]
April 11–13, 2017: IXPUG Annual Spring Conference Sessions [Open to public]
IXPUG is about sharing ideas, implementations, and experiences that will help users take advantage of the latest in Intel Xeon Phi technology, such as AVX512 and high-bandwidth MCDRAM memory, as well as relevant high-performance system fabrics on large-scale KNL-based systems (e.g. OmniPath).
Hosted by the The Stephen Hawking Centre for Theoretical Cosmology (CTC) at the University of Cambridge, the IXPUG Annual Spring Conference 2017 will centre on Xeon Phi-focused activity (including presentations and tutorials), where you will experience an open forum with fellow application programmers, software developers, Intel Xeon Phi architecture designers, and compiler and tool experts. Application performance and scalability challenges at all levels will be covered, including application tuning on large KNL systems.
Registration is now closed. Late registrations may still be accepted - for inquiries please contact Juha Jaykka <This email address is being protected from spambots. You need JavaScript enabled to view it.> directly
Meeting Survey: If you attended the Spring Meeting, please complete the survey so we know how we did! Fill it out here.
Video from these sessions will be streamed to our YouTube Page.
Meeting Location: The conference venue is the Centre for Mathematical Sciences (red pin) and the dinner venue is Trinity Hall (green pin). See the interactive map on the Cambridge website.
Day 1: Monday, April 10, 2017 - Intel Parallel Computing Center Members Only
Start |
End |
Title |
Author(s) |
12:00 |
13:00 |
Lunch/Networking |
Intel Parallel Computing Center (IPCC) Members Only |
13:00 |
13:15 |
Welcome |
Intel PCC Program Office |
13:15 |
14:45 |
Intel Hardware Update |
Intel Staff |
14:45 |
15:00 |
Break |
|
15:00 |
16:00 |
Intel Software Tools |
Intel Staff |
16:00 |
16:30 |
New Intel PCCs |
TBA |
16:30 |
17:00 |
Closing Remarks |
Intel PCC Program Office |
Day 2: Tuesday, April 11, 2017 - IXPUG Annual Spring Conference
Start |
End |
Title |
Author(s) |
Presentation |
Video |
8:30 |
9:00 |
Registration & Coffee/Tea |
|
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|
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Opening Session [Chair: Lisa Smith] |
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|
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9:00 |
9:10 |
Welcome from the IXPUG Spring 2017 Chair |
Professor Paul Shellard,The Stephen Hawking Centre for Theoretical Cosmology at University of Cambridge |
PDF |
|
9:10 |
9:20 |
Welcome from the IXPUG Chair |
Michael Lysaght, ICHEC |
PDF |
|
9:20 |
10:00 |
Keynote: Parallelism, why and how? |
James Cownie, Intel Corporation |
PDF |
Video |
10:00 |
10:30 |
Site Updates (15 minutes each) |
- MARCONI, Fabio Affinito, CINECA
- Cambridge, Gilles Civario, DellEMC
|
PDF
PDF
|
Video |
10:30 |
11:00 |
Early Science with KNL |
Richard Gerber, NERSC |
PDF |
Video |
11:00 |
11:30 |
Tea Break |
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Lightning Talks I [Chair: Thomas Steinke] |
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11:30 |
12:45 |
IXPUG Lightning Talks (15 minutes each) |
- LT1: Scaling Distributed Neural Network Training on Large HPC Clusters, Valeriu Codreanu, Damian Podareanu and Vikram Saletore
- LT2: Benchmarking performances of the Xeon-Phi KNL with a CFD code, Alessandro Gabbana
- LT3: Optimizing Elmer finite element software on KNL, Juhani Kataja, Mikko Byckling and Thomas Zwinger
- LT4: Oakforest-PACS: Japan's no. 1 System driven by KNL and OPA, Taisuke Boku
|
LT1 PDF
LT2 PDF
LT3 PDF
LT4 PDF
|
Video
Video
Video
Video
|
12:45 |
14:00 |
Lunch |
|
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|
|
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Multi-node Session [Chair: Richard Gerber] |
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14:00 |
14:30 |
IXPUG Presentation 1 |
Pre-exascale architectures: Many-core Intel KNL performance and usability assessment for French scientific communities, Gabriel Hautreux and Eric Boyer |
PDF |
Video |
14:30 |
15:00 |
IXPUG Presentation 2 |
Performance optimization of OpenFOAM on KNL, Ravi Ojha, Paul Edwards, Prasad Pawar, Nishant Agrawal and Sonia Rani |
PDF |
Video |
15:00 |
15:30 |
IXPUG Presentation 3 |
SeisSol on KNL, Carsten Uphoff and Michael Bader |
PDF |
Video |
15:30 |
16:00 |
IXPUG Presentation 4 |
Grid: Structured Cartesian Mesh Library for Quantum Chromodynamics, Peter Boyle, Guido Cossu, Antonin Portelli and Azusa Yamaguchi |
PDF |
Video |
16:00 |
16:30 |
Tea Break |
|
|
|
16:30 |
17:00 |
IXPUG Presentation 5 |
Deep Learning under the Hood, Sidharth N. Kashyap, Angus Lepper, Peter Boyle |
PDF |
Video |
|
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Lightning Talks II [Chair: Michael Lysaght] |
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17:00 |
18:00 |
Lightning Talks (15 minutes each) |
- LT5: An efficient SIMD implementation of pseudo Verlet-lists for neighbour interactions in particle-based codes, James Willis and Matthieu Schaller
- LT6: Special functions in quantum chemistry, Vladimir Mironov and Alexander Moskovsky
- LT7: Numerical general relativity on Intel KNL, Alejandro Duran, Juha Jäykkä, Markus Kunesch and Saran Tunyasuvunakool
|
LT5 PDF
LT6 PDF
LT7 PDF
|
Video
Video
Video
|
18:15 |
20:30 |
Networking Reception |
Sponsored by DellEMC |
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|
Day 3: Wednesday, April 12 2017 - IXPUG Annual Spring Conference
Start |
End |
Title |
Author(s) |
Presentation |
Video |
8:30 |
9:00 |
Registration & Coffee/Tea |
|
|
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|
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Vectorization/Task Parallelism Session [Chair: John Pennycook] |
|
|
|
9:00 |
9:30 |
IXPUG Presentation 6 |
Optimizing Vlasiator on KNL, Sebastian von Alfthan |
PDF |
Video |
9:30 |
10:00 |
IXPUG Presentation 7 |
The GeantV prototype on KNL, Andrei Gheata, Sofia Vallecorsa and Federico Carminati |
PDF |
Video |
10:00 |
10:30 |
IXPUG Presentation 8 |
BEM quadrature schemes for many- core architectures, Jan Zapletal, Michal Merta and Lukas Maly |
PDF |
Video |
10:30 |
11:00 |
IXPUG Working Groups 2017 & Discussion Board |
Michael Lysaght, John Pennycook |
PDF |
|
11:00 |
11:30 |
Tea Break |
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|
|
11:30 |
12:00 |
IXPUG Presentation 9 |
Task-based parallelism in DL_POLY_4, Aidan Chalk, Alin Marin Elena and Luke Mason |
PDF |
Video |
|
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Lightning Talks III [Chair: Juha Jaykka] |
|
|
|
12:00 |
13:00 |
IXPUG Lightning Talks (15 minutes each) |
- LT8: Deeper Insight with Intel Advisor’s Cache Aware Roofline Model, Michael Lysaght
- LT9: Running containers on Intel® Xeon Phi™ processors, Piotr Uminski and Jakub Dlugolecki
- LT10: Ensuring program correctness and optimal performance on Intel Knights Landing with Allinea tools, Patrick Wohlschlegel
|
LT8 PDF
LT9 PDF
LT10 PDF
|
Video
Video
Video
|
13:00 |
14:00 |
Lunch Break |
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Memory/Data Locality Session [Chair: Gilles Civario] |
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14:00 |
14:30 |
IXPUG Presentation 10 |
The MEGA-STREAM benchmark on Intel Xeon Phi processors (Knights Landing), Tom Deakin, John Pennycook, Andrew Mallinson, Wayne Gaudin and Simon Mcintosh-Smith |
PDF |
Video |
14:30 |
15:00 |
IXPUG Presentation 11 |
Vectorization and locality optimization for seismic imaging through automatic code generation, Navjot Kukreja, Fabio Luporini, Mathias Louboutin, Michael Lange and Gerard Gorman |
PDF |
Video |
15:00 |
15:30 |
IXPUG Presentation 12 |
Improving achieved memory bandwidth from C++ codes on Intel® Xeon Phi™ Processor (Knights Landing), Karthik Raman, Tom Deakin, James Price and Simon Mcintosh-Smith |
PDF |
Video |
15:30 |
16:00 |
IXPUG Presentation 13 |
Acceleration of Blender Cycles Render Engine using Intel Xeon Phi , Milan Jaros and Michal Merta |
PDF |
Video |
16:00 |
16:30 |
Tea Break |
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Lightning Talks IV [Chair: Michael Lysaght] |
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|
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16:30 |
17:30 |
IXPUG Lightning Talks (15 minutes each) |
- LT11: High Fidelity and High Performance Visualization, Johannes Günther
- LT12: Simultaneous offload using multiple accelerators, Matthias Noack and Kacper Kornet
- LT13: Offloading over Fabric for the Timothy application: Running agent-based parallel tissue modeling framework on a heterogeneous system with Intel® Xeon® and Xeon Phi™ Processors, Piotr Uminski, Maciej Cytowski, Zuznna Szymanska, Krzysztof Raszkowski and Grzegorz Andrejczuk
|
LT11 PDF
LT12 PDF
LT13 PDF
|
Video
Video
Video
|
17:30 |
18:00 |
Panel Discussion: "Looking back, looking forward: where are the next opportunities and challenges for applications on Intel Xeon Phi?" |
Richard Gerber (NERSC), Jim Cownie (Intel), Thomas Steinke (ZIB), John Pennycook (Intel)
|
|
|
18:00 |
18:10 |
Closing Remarks |
Michael Lysaght
|
|
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19:00 |
|
Conference Dinner
|
Conference Banquet at Trinity Hall College
|
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Day 4: Thursday April 13, 2017: IXPUG Annual Spring Conference
Start |
End |
Title |
Author(s) |
Presentation |
Video |
8:30 |
9:00 |
Registration & refreshments |
|
|
|
9:00 |
12:30 |
MPI programming on KNL systems
|
Heinrich Bockhorst, Intel |
PDF |
|
12:30 |
14:00 |
Lunch Break |
|
|
|
14:00 |
17:00 |
Offload over Fabric: Modernize your Application for Heterogeneous Compute using OpenMP
|
Jan Zielinski, Intel |
PDF |
|
Important Dates:
Abstract Submission Deadline |
26 February 2017 (AoE), extended to 5 March 2017 |
Abstracts Reviewed by IXPUG Committee |
27 Feb - 3 March 2017, extended to 5 March - 10 March 2017 |
Acceptance Notification |
7 March 2017, extended to 14 March 2017 |
Preliminary Agenda Posted to IXPUG Website |
10 March 2017, extended to 17 March 2017 |
Registration Deadline |
24 March 2017 |
Agenda Finalized (Presenter Notifications) |
31 March 2017 |
Final Presentations Due from Speakers |
5 April 2017 |
Intel PCC Sessions |
10 April 2017 |
IXPUG Sessions |
11-13 April 2017 |
Travel Information:
- Visa Requirements: Please contact This email address is being protected from spambots. You need JavaScript enabled to view it. at University of Cambridge for visa inquiries.
- Transportation, Parking, etc.: Information on how to get to the venue can be found here.
- Lodging: Hotel recommendations listed below. A useful site for finding accommodation here
Hotel |
Hotel Address |
Arundel House Hotel
|
Chesterton Road, Cambridge CB4 3AN
Phone: +44 (0) 1223 367 701 |
Varsity Hotel |
Thompson’s Lane (off Bridge Street) Cambridge CB5 8AQ
Phone: +44 (0) 1223 30 60 30 |
Hotel Felix
|
Whitehouse Lane, Huntingdon Road,Cambridge, CB3 0LX
Phone: +44 01223 277977 |
Hilton (City Centre) |
Downing Street, Cambridge, CB2 3DT, United Kingdom
Phone: +44 1223 464491 |
Hilton (By the river) |
Granta Place Mill Lane, Cambridge,CB2 1RT, United Kingdom
Phone: +44 1223 259988 |
Organizing Committee and Contacts
Organizing Committee:
- Juha Jaykka, This email address is being protected from spambots. You need JavaScript enabled to view it., Department of Applied Mathematics and Theoretical Physics, University of Cambridge, UK
- Estela Suarez, This email address is being protected from spambots. You need JavaScript enabled to view it., Forschungszentrum Juelich / Juelich Supercomputing Centre, Germany
- Thomas Steinke, This email address is being protected from spambots. You need JavaScript enabled to view it., Zuse Institute Berlin, Germany
- David Martin, This email address is being protected from spambots. You need JavaScript enabled to view it., Argonne National Laboratory, US
- John Pennycook, This email address is being protected from spambots. You need JavaScript enabled to view it., Intel Corporation, United States
- Richard Gerber, This email address is being protected from spambots. You need JavaScript enabled to view it., National Energy Research Scientific Computing Center, Lawrence Berkeley National Lab
- Michael Lysaght, This email address is being protected from spambots. You need JavaScript enabled to view it. , Irish Centre for High End Computing (ICHEC), Ireland
Local Organizer:
- James Parke, This email address is being protected from spambots. You need JavaScript enabled to view it., University of Cambridge
Call for Presentations:
IXPUG welcomes submissions on innovative work from KNL users in academia, industry and government labs, describing original discoveries and experiences that will promote and prescribe efficient use of many-core and multicore systems. The authors of the best scored abstracts and draft presentations will be selected for a full 30 minute presentation; others may be offered an opportunity to present shorter Lightning Talks.
Submission Guidelines:
A short Abstract and Draft Presentation should be submitted by Sunday, 26th February. Sunday, March 5 [Deadline extended 1 week!] The Draft Presentation does not need to be complete by this date. However, along with the Abstract, it should reflect the overall intent of the presentation and contain placeholders for the remaining content to be completed by the Final Presentation Deadline on 5th April. Presentations describing application results on multi-node configurations/addressing KNL-specific features (e.g. use of MCDRAM)/peformance tools exploitation will be prioritized. For presentation format, please use the IXPUG presentation template and you can submit your abstract to IXPUG EasyChair.
Topics of interest are (but not limited to):
- Vectorization: Data layout for efficient SIMD operations, SIMD directives and operations
- Memory: Data layout in memory for efficient access and caching (data preconditioning), access latency concerns (prefetch, streams, costs for MCDRAM), partitioning of DDR and MCDRAM for applications (memory policies)
- Communication: including early experiences with Omni-Path
- Thread and Process Management: Process and thread affinity issues, SMT (simultaneous multi-threading, in core), balancing processes and threads, nested threading (per tile or core)
- Multi-node Application Experience: especially on large-scale KNL systems
- Programming Models: OpenMP 4.x, hStreams, MPI 3.0, hybrid programming (e,g, MPI/OpenMP,), others
- Algorithms and Methods: including scalable and vectorizable algorithms
- Software Environments and Tools
- Benchmarking & Profiling Tools
- Visualization
Preliminary Agenda Schedule (final agenda will be published after abstract submission review):
- Monday, April 10, 2017: Intel Parallel Computing Center (Intel PCC) members only meeting, light lunch during 12:00 - 13:30, followed by Intel PCC sessions (13:30-1700)
- Tuesday, April 11, 2017: IXPUG Annual Spring Conference, keynote, presentations, etc.
- Wednesday, April 12, 2017: IXPUG Annual Spring Conference, presentations, followed by conference dinner
- Thursday, April 13, 2017: IXPUG Annual Spring Conference, tutorial day