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Performance Portability in a Heterogenous World – Pipe Dream?

Location: In-person at SC22, Dallas, Texas – Room C146

Date & Time: Tuesday, November 15 5:15-6:45 p.m. CT


Event Description: With increasing heterogeneity in system deployments (CPUs, GPGPUs, AI accelerators, FPGAs, IPU/DPUs), HPC users face a daunting task of programming for such diverse architectures. This BoF, organized by the IXPUG, but not limited to Intel technology, will focus on sharing expertise in portable programming across a wide variety of architectures, running a diverse set of workloads. This BoF will explore current approaches and best practices for programming across heterogeneous systems and exotic architectures, with the goal of identifying a common set of principles and practices that can be leveraged to develop and maintain software across sites, architectures, and applications.
Time Title Presenter
5:15-5:20 Welcome

David Martin, Argonne National Laboratory
Amit Ruhela, Texas Advanced Computing Center

5:20-5:30  Towards Performance Portability: A Use Case, Lessons Learned and Outlook Steffen Christgau, Zuse Institute Berlin (ZIB)
5:30-5:40  Are We Dreaming the Same Dream? John Pennycook, Intel Corporation
5:40-5:50  Performance Portability in the Exascale Era Scott Parker, Argonne National Laboratory
5:50-6:00  Seeking Performance Portability at Scale with FleCSI Scott Pakin, Los Alamos National Laboratory
6:00-6:10  Design of Performance Portability Layers at CEA Julien Jaeger, CEA
6:10-6:45  Panel with all speakers  

Session Leader: David Martin, Argonne National Laboratory

Additional Session Leaders:

  • Clayton Hughes, Sandia National Laboratories
  • Nalini Kumar, Intel Corporation
  • Christopher Mauney, Los Alamos National Laboratory
  • Thomas Steinke, Zuse Institute Berlin

General questions should be sent to This email address is being protected from spambots. You need JavaScript enabled to view it.