Software developer training for the Intel® Xeon Phi™

This one-day training will provide software developers the foundation needed for modernizing their code to take advantage of parallel architectures found in both the Intel® Xeon® processor and the Intel® Xeon Phi™ coprocessor.

The course contains materials and practical exercises appropriate for developers beginning their journey to parallel programming, as well as provides cutting-edge detail to HPC experts on the best practices for Intel's multi- and many-core architectures and software development tools.

For software engineers and architects, this training will cover:

  • An overview of parallel programming frameworks and optimization guidelines for multi-core CPUs (Intel® Xeon®) and many-core coprocessors (Intel® Xeon Phi™)
  • Discussions about three layers of parallelism: SIMD, Threads, Cluster environment
  • Tips for quick porting/development of HPC software applications
  • Real-life examples of code and optimization techniques
  • Hardware solution and corresponding software implementations, APIs, and framework

More Information & Registration Link

TACC, Austin, TX
Meeting Date(s): 
Tuesday, April 22, 2014 - 13:00