SC25 IXPUG BoF

IXPUG Workshop at HPC Asia 2026

SC25 IXPUG BoF

Navigating Complexity: Achieving Performance Portability in the Evolving Landscape of Accelerated HPC Systems

Location: In-person at SC25, St. Louis, Missouri – room number 130

Date & Time: Wednesday, November 19, 2025 12:15-1:15 p.m. CST

Registration: https://sc25.supercomputing.org/attend/registration/

SC25 Session Page: https://sc25.conference-program.com/presentation/?id=bof136&sess=sess449

Event Description: With the increasing demand for AI in HPC, there has been a rapid rise in accelerated architectures, portable programming models, and frameworks. The already-daunting task of programming for accelerated systems has become even more complex. This BoF, organized by IXPUG, will focus on portable programming across a wide range of heterogeneous architectures—including Intel, Nvidia, AMD, and Arm—supporting diverse simulation, data analytics, and AI workloads. The session will explore key challenges, state-of-the-art solutions, and emerging best practices for programming across these systems, identifying common principles and methodologies that support development and long-term maintenance across sites, architectures, and scientific applications.

Agenda: 

12:15-12:20 p.m. Introductions - Dr. Amit Ruhela, Texas Advanced Computing Center
12:20-01:00 p.m. Panelist Presentations

  • 12:20-12:30 p.m. Dr. David Keyes, King Abdullah University of Science & Technology
  • 12:30-12:40 p.m. Dr. Andreas Herten, Forschungzentrum Juelich
  • 12:40-12:50 p.m. Dr. Antonio J. Peña, Barcelona Supercomputing Center (BSC)
  • 12:50-01:00 p.m. William Fowler, Intel Corporation

01:00-01:15 p.m. Open Discussion and Q&A

 Panelists:

  • Dr. David Keyes, King Abdullah University of Science & Technology  
    David Keyes is a professor of Applied Mathematics, Computer Science, and Mechanical Engineering at the King Abdullah University of Science and Technology (KAUST), where he was a founding Dean in 2009 and founding Director of the Extreme Computing Research Center in 2012. He is also an adjunct professor of Applied Mathematics and Applied Physics at Columbia University, where he formerly held the Fu Foundation Chair. Keyes focuses on scalable solvers that exploit hierarchy and data sparsity, targeting power-austere emerging architectures. He collaborates on large-scale applications in energy and environment that demand high performance because of resolution, dimension, high fidelity physical models, or the “multi-solve” requirements of optimization, control, sensitivity analysis, inverse problems, data assimilation, or uncertainty quantification.
  • Dr. Andreas Herten, Forschungzentrum Juelich
    Andreas Herten is a researcher at Jülich Supercomputing Centre, heading the Accelerating Devices Lab within the Novel System Architecture Design Division, which he co-leads; he is also a lecturer at the University of Cologne. He is part of the NVIDIA Application Lab at Jülich, in which he analyzes, ports, and optimizes scientific applications for GPUs. He is part of the core JUPITER team to deploy the system. Andreas is also involved in EU-funded projects for improving scalability of GPU-enabled applications and other accelerators, like RISC-V.
  • Dr. Antonio J. Peña, Barcelona Supercomputing Center (BSC)
    Antonio J. Peña earned his PhD in Advanced Computer Systems from Universitat Jaume I (Spain, 2013), where he proposed the rCUDA remote GPGPU virtualization framework. He later worked as a Postdoctoral Researcher at Argonne National Laboratory (USA) with the MPICH R&D team on programming models and runtime systems. Currently, he is a Leading Researcher at the Barcelona Supercomputing Center (BSC), heading the “Accelerators and Communications for HPC” group, and also serves as Teaching and Research Staff at Universitat Politècnica de Catalunya. A Ramón y Cajal Fellow and former Marie Sklodowska-Curie Fellow, he now holds an ERC Consolidator Grant. His awards include the 2023 Agustín de Betancourt y Molina Award (Spanish Royal Academy of Engineering) and the 2017 IEEE TCHPC Award for Excellence for Early Career Researchers. He contributes to the organization and steering of major HPC conferences and focuses on runtime systems, programming models, heterogeneity, and communications.
  • William Fowler, Intel Corporation

 

 

Session Leader:

     David Martin, Northwestern University


Session Organizers:

    Amit Ruhela, Texas Advanced Computing Center (TACC)
    Christopher Mauney, Los Alamos National Laboratory
    Clay Hughes, Sandia National Laboratories
    Glenn Brook, Cornelis Networks
    Hatem Ltaief, King Abdullah University of Science & Technology
    Nalini Kumar, Intel Corporation

Contact: Please contact This email address is being protected from spambots. You need JavaScript enabled to view it. with any general questions.