IXPUG Events at ISC'15

Please join us at the following events during ISC’15, by registering for a workshop pass through the ISC’15 registration office.

ISC Birds of a Feather BoF13: "Unleashing the Power of Next-Generation Many-Core Processors"

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Wednesday, July 15, 2015, 12:15 p.m. – 1:15 p.m. in Booth #210.

  • Welcome and Introduction, Thomas Steinke, Zuse-Institut Berlin 
  • Lightning Talks, CJ Newburn, Intel
    • Performance Optimization of OpenFOAM on Xeon/XeonPhi, Nishant Agrawal, TCS Innovation Labs
    • Quickly selecting nearest particles in the FoF component of Gadget, Luigi Iapichino, Leibniz-Rechenzentrum (LRZ)
    • Migrating to OpenMP Offloading, Kent Milfeld & Carlos Rosales, Texas Advanced Computing Center
    • High Performance Python Offloading, Michael Klemm, Intel GmbH
    • Offloading Of the NWChem CCSD(T) Method at Scale, Michael Klemm, Intel GmbH
  • Lightning Talk on Intel Tools, Michael Steyer, Intel
  • Lightning Talk on Allinea Tools, Mark O'Connor, Allinea
  • Open Discussion, Q&A
  • IXPUG Community and News, Richard Gerber, IXPUG President
  • Wrap Up, Kent Milfeld, TACC

ISC Workshop Workshop: "The Road to Application Performance on Intel® Xeon Phi™ Coprocessor”

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Thursday, July 16, 2015 9:00am – 1:00pm in Frankfurt Marriott Hotel Room Kilobyte

  • 9:00 - 9:05: Welcome – IXPUG Executive Committee
  • 9:05 - 9:35: Intel(R) Xeon Phi(TM) Processor code named Knights Landing Architecture Overview: Avinash Sodani, Intel
  • 9:35 - 10:00: Code for the future: Knights Landing and beyond: CJ Newburn, Intel
  • 10:00 - 11:00: Vectorizing Code for the Intel Xeon Phi, Chair: Richard Gerber, National Energy Scientific Computing Center, Lawrence Berkeley National Laboratory
    • 10:00 - 10:05: Vectorization metrics and how to collect themZakhar Matveev, Intel (5 min) 
    • 10:05 -10:15 Vectorization Topic 1: Language Implications for Vectorization
      •  Ghilherme Amadio, São Paulo State University; Florian Wende, Zuse-Institut Berlin
    • 10:15 - 10:50:  Vectorization Topic 2: Vectorization Effectiveness
      • Case study: Nishant Agrawal, TCS Innovation Labs (5 min)
      • Case study: Richard Bower, Durham University (5 min)
      • Case study: Sergi Siso,  Hartree, STFC Daresbury Laboratory (5 min)
      • Case study: Servesh Muralidharan, Irish Centre for High-End Computing (5 min)
      • Discussion, key points and directions, CJ Newburn Intel (10 min)
    • 10:50 - 11:00:  Vectorization Topic 2: SIMD Capability and Feature Differences Between OpenMP and CilkPlus
      •  Kent Milfeld and Carlos Rosales, Texas Advanced Computing Center
  • 11:00-11:30 Coffee Break
  • 11:30-12:10 Memory Tuning for the Intel Xeon Phi, Chair: Thomas Steinke, Zuse-Institut Berlin
    •  Memory Tuning Topic 1: Latency Sensitivity
      • Contributors: Nishant Agrawal and Ambuj Pandey, TCS Innovation Labs; Kent Milfeld and Carlos Rosales, Texas Advanced Computing Center; John Michalakes, National Oceanic and Atmospheric Administration; Andrew Mallinson, Dmitry Prohorov, Ashish Jha, Mike Brown, and David Kunzman, Intel
    •  Memory Tuning Topic 2: Data Layout
      • Contributors: Sergi Siso, Hartree, STFC Daresbury Laboratory; Kent Milfeld and Carlos Rosales, Texas Advanced Computing Center; Luigi Iapichino, Leibniz Supercomputing Centre; Gilles Civario and Michael Lysaght, Irish Centre for High End Computing
  • 12:10-12:55 Panel Discussions ,Chair: Thomas Steinke, Zuse-Institut Berlin
    • Panelists: Edmond Chow, Georgia Institute of Technology; Simon McIntosh-Smith, University of Bristol; Gerard Gorman, Imperial College London; Scott French, National Energy Research Scientific Computing Center (NERSC)
  • 12:55-1:00 Wrap Up