TACC KNL Tutorial in Frankfurt


Date: June 19, 2016

Time: 8:00am – 12:00pm

Location: Frankfurt Hotel Marriott (Hamburger Allee 2 Frankfurt Hessen 60486 Germany)

Registration Link: https://portal.tacc.utexas.edu/training/#/session/27

Brief Description:

The Texas Advanced Computing Center (TACC) at the University of Texas at Austin, in partnership with Intel Corporation, is proud to  announce a special tutorial event as part of the Intel Xeon Phi User Group (IXPUG) Meeting fin Frankfurt, Germany. This event will provide hands-on experience on the latest Intel product, the second generation Intel Xeon Phi, also known as Knights Landing (KNL). Attendees to this half-day event will be some of the first researchers in the world to have access to the KNL platform.

Hands-on exercises will be executed on the Stampede system at TACC. Stampede has been updated with KNL processors, which will be made available to the general public later this year.

Intel's next generation Xeon Phi, Knights Landing (KNL), brings many changes from the first generation, Knights Corner (KNC). This tutorial will review the KNL architecture and discuss the differences between KNC and KNL, including self-hosting vs. coprocessor design, core interconnection technology and clustering topologies, and hierarchical memory based on new MCDRAM technology. Many of the lessons learned from KNC, including efficient multi-threading, optimized vectorization, and strided memory access will be revisited and updated for KNL, and recommendations regarding MPI task layout when using Intel OmniPath will be provided. Tutorial attendees should be familiar with MPI and OpenMP.

This tutorial will focus on the use of reports and directives to improve vectorization and the implementation of proper memory access, and showcase new Intel VTune Amplifier XE capabilities that allow for in-depth memory access analysis and hybrid code profiling.

The first forty registered attendees through the door will also receive a copy of the new book: Intel® Xeon Phi Processor High Performance Programming, Knights Landing Edition, by Jim Jeffers, James Reinders, and Avinash Sodani.

**NOTE: This training is being offered at the Frankfurt Marriott, rather than at the ISC Conference Location, and is not part of the ISC Tutorial track.** 


Stampede is supported by the US National Science Foundation.  Stampede is provided by TACC in conjunction with Dell, Intel and academic partners Clemson University, Cornell University, University of Colorado, Indiana University, The Ohio State University, and the University of Texas at El Paso.