2017 IXPUG US Annual Meeting

 

IXPUG

 2017 IXPUG US Annual Meeting at TACC


Experts from around the world are invited to the Texas Advanced Computing Center (TACC) in Austin, TX for the
IXPUG 2017 Annual US Meeting (IXPUG2017).
Share experiences with Xeon Phi-based systems, and learn how to optimize software for manycore machines.

 

Location:  The Texas Advanced Computing Center (TACC)
                      The University of Texas at Austin, JJ Pickle Research Campus, Austin, TX USA
  
Date:         September 26-28, 2017

 

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Keynote Speakers: 

James R. Reinders

Nishanth Dandapanthu (Dell EMC)

Sameer Shende (ParaTools, Inc., U of Oregon)

Intel Roadmap/Technologies Speakers: 

Barry Davis (Intel)

 

Day 1: Tuesday, Sept. 26, 2017 - IXPUG Annual Fall Conference 

Tuesday zoom web link to sessions:

Join from PC, Mac, Linux, iOS or Android: https://zoom.us/j/228599669

Or iPhone one-tap : 
    US: +16468769923,,228599669#  or +16699006833,,228599669# 
Or Telephone 
    Dial(for higher quality, dial a number based on your current location) 
        US: +1 646 876 9923  or +1 669 900 6833  or +1 408 638 0968 
    Meeting ID: 228 599 669 
    International numbers available: https://zoom.us/zoomconference?m=skWnYxz5LumksZoIM8ZCln1IOX8LOfFC

Day 1: Tuesday, Sept. 26, 2017 - IXPUG Annual Fall Conference 

Start End Title Author(s)  
 8:00  8:30 Registration & Continental Breakfast    
    Opening Session [Chair: Lisa Smith]    
 8:30  8:35 Welcome from TACC Dan Stanzione  
 8:35  8:45 Welcome from IXPUG Leadership Team  David Martin  
 8:45  9:45 Keynote1: "Supercomputing" is the best description of the future of HPC  James Reinders (Intel Corporation, retired 2016),  Parallel Programming and HPC Enthusiast (and Expert)   Video_k1
 9:45  10:30 Center Updates (~15 minutes each)

- NERSC, Richard Gerber

 - TACC, Dan Stanzione

- ALCF (ANL), David Martin 

  Video
 10:30  11:00 Coffee Break    
    Session 1 [Chair:David Martin]    
 11:00  12:00

11 Advancing MPI Libraries to the Many-core Era: Designs and Evaluations with MVAPICH2 

9 Performance of PGAS Models on KNL: A Comprehensive Study with MVAPICH2-X

Sourav Chakraborty, Mohammadreza Bayatpour, Hari Subramoni and Dhabaleswar Panda  

Jahanzeb Maqbool Hashmi, Mingzhe Li, Hari Subramoni and Dhabaleswar Panda

 Video 
 12:00  1:00 Lunch    
    Session 2 [Chair:Lars Koesterke]    
 1:00  2:30

4 Software modernization strategies adopted in Genesis – a Molecular Dynamics Application for Biological Materials targeting LANL’s Trinity  Phase 2 Cray KNL platform

13 Improving the Performance of the MILC Code on Intel Knights Landing, An Overview

14 Performance Portability of the Wilson Dslash Operator for Lattice QCD

Adetokunbo Adedoyin

 

 

Douglas Doerfler, Karthik Raman and Ruizi Li

 

Balint Joo, Thorsten Kurth, Jack Deslippe and Kate Clark

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 2:30  3:00 Coffee Break  
    Session 3 [Chair: Richard Gerber]    
 3:00  4:30 5 Early Results of Deep Learning on the Stampede2 Supercomputer

12 Operating JLab’s SciPhi-XVI KNL cluster

21 OpenMP Affinity in Many-core Computing

Zhao Zhang, Weijia Xu, Niall Gaffney and Daniel Stanzione

Sandra Philpott

Kent Milfeld

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 Evening  4:30-6:00 TACC Tour and Reception  Tommy Minyard and Melyssa Fratkin  
 
 
 

Day 2: Wednesday, Sept. 27, 2017 - IXPUG Annual Fall Conference 

Wednesday zoom web link to sessions:

Join from PC, Mac, Linux, iOS or Android: https://zoom.us/j/967398855

Or iPhone one-tap : 
    US: +14086380968,,967398855#  or +16468769923,,967398855# 
Or Telephone 
    Dial(for higher quality, dial a number based on your current location) 
        US: +1 408 638 0968  or +1 646 876 9923  or +1 669 900 6833 
    Meeting ID: 967 398 855 
    International numbers available: https://zoom.us/zoomconference?m=_UCu6uYzCqxCUCoaHao-oM6QJZABgcPF

Day 2: Wednesday, Sept. 27, 2017 - IXPUG Annual Fall Conference 

Start End Title Author(s)  
 8:00  8:30 Registration & Continental Breakfast    
    Session [Chair: Lisa Smith]    
 8:30  9:30 Keynote: Pursuit in the simplification of HPC and Deep Learning Nishanth Dandapanthu (Dell EMC)   video_k2
 9:30  10:30 Intel Compiler and Tools Updates James Tullos (Intel)  
 10:30  11:00 Break    
    Lightning Talk Session 4 [Chair: Clayton Hughes]    
 11:00  12:00

10 Reducing OS noise using offload driver on Intel Xeon Phi x200 Processor

8 A Comparative Evaluation of Xeon Phi Platforms Based on a Hodgkin-Huxley Neuron Simulator

22 Using an Interactive Tool to adapt codes to KNL

7 In Situ Visualization on Stampede2 - an IXPUG Workshop Report

 

Feedback on IXPUG Working Groups

Grzegorz Andrejczuk and Jarek Kogut

 

George Chatzikonstantis, Diego Jimenez, Esteban Meneses, Christos Strydis, Harry Sidiropoulos and Dimitrios Soudris

Lars Koesterke and Ritu Arora

Paul Navratil and Jim Jeffers

 


John Penneycook

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 12:00  1:00 Lunch    
    Session 5 [Chair: John Pennycook]    
1:00  2:30 1 MPI/OpenMP parallelization of the Hartree-Fock method for the second generation of Intel Xeon Phi processor

 

16 Performance optimization of WEST and Qbox on Intel Knights Landing

18 Rapid evaluation of scalar and vector fields of molecular charge density properties on KNL

Vladimir Mironov, Yuri Alexeev, Kristopher Keipert, Michael Dmello, Alexander Moskovsky and Mark Gordon

 

Huihuo Zheng, Christopher Knight, Giulia Galli, Marco Govoni and Francois Gygi

Alvaro Vazquez Mayagoitia, Raymundo Hernandez-Esparza and Jorge Garza

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 2:30  3:00 Break    
    Session 6 [Chair:Kent Milfeld]    
 3:00  4:00 Intel Roadmap/Technologies  Barry Davis (Intel Corporation)  
 4:00  4:45 Panel:  Where are we going next? James Reinders, Tommy Minyard (TACC), Nishanth Dandapanthu (Dell EMC), Richard Gerber (NERSC), David Martin (ANL), Sameer Shende (ParaTools, UofOregon)
 
 Evening  6:00 TEXAS BBQ Dinner at County Line On The Lake  Meet at Hyatt House for bus ride (6:00).  
 
 
 
 

Day 3: Thursday, Sept. 28, 2017 - IXPUG Annual Fall Conference

Thursday zoom web link to sessions:

Join from PC, Mac, Linux, iOS or Android: https://zoom.us/j/967398855

Or iPhone one-tap : 
    US: +14086380968,,967398855#  or +16468769923,,967398855# 
Or Telephone 
    Dial(for higher quality, dial a number based on your current location) 
        US: +1 408 638 0968  or +1 646 876 9923  or +1 669 900 6833 
    Meeting ID: 967 398 855 
    International numbers available: https://zoom.us/zoomconference?m=_UCu6uYzCqxCUCoaHao-oM6QJZABgcPF

 

Day 3: Thursday, Sept. 28, 2017 - IXPUG Annual Fall Conference 

Start End Title Author(s)  
 8:00  8:30 Registration &  Continental Breakfast    
    Opening Session [Chair: Lisa Smith]    
8:30  9:30 Keynote: Portable Performance Tools to Observe, Optimize, and Scale Application Sameer Shende (ParaTools, Inc. U. of Oregon)  video_k3
    Session 7 [Chair: John Cazes]    
 9:30  10:30

2 Harnessing the Intel Xeon Phi x200 Processor for Earthquake Simulations

20 Optimization Strategies for WSM6 on KNL

Alexander Breuer, Yifeng Cui, Alexander Heinecke, Josh Tobin and Charles Yount

Timbwaoga Ouermi, Martin Berzins and Robert M. Kirby

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 10:30  10:45 Break    
    Session 8 [Chair: Doug Doerfler ]  --- 26min presentations    
 10:45  12:30

15 WARP3D Implementation of MKL Cluster Pardiso Solver

17 Scaling and optimization results of the real-space DFT solver PARSEC on Haswell and KNL systems

6 KNL Disabled Tiles and Performance Variability

19 Vectorization for non-trivial data structures

Jeremy Nicklas, Karen Tomko, Robert Dodds and Kevin Manalo

Kevin Gott, Charles Lena, Ariel Biller, Josh Neitzel, Kai-Hsin Liou, Jack Deslippe and James R Chelikowsky

 

Phillip Romero

Ivo Kabadshow and Andreas Beckmann

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 12:30  1:00 Lunch    
    TAU Tutorial   Sameer Shende  
 1:00  3:00 TAU The complex nature of HPC platforms and the application development
environment, combining multiple languages, programming paradigms, hardware,

and compilers, make effective performance engineering a challenging task. To meet the needs of computational scientists in performance engineering their codes, we present a tutorial with hands-on sessions on the TAU Performance System. TAU is a powerful profiling and tracing toolkit that covers multiple aspects of performance instrumentation, measurement, and analysis. After describing and demonstrating how performance data is collected using TAU’s automated instrumentation, the workshop will present ways to analyze the performance data collected and to drill down to find performance bottlenecks. Topics will cover generating performance profiles and traces with memory and system load utilization metrics, I/O, communication, and hardware performance counter data using PAPI. The workshop will cover instrumentation of Hybrid MPI and OpenMP codes on the Stampede 2 Intel Xeon Phi (KNL) platform at TACC. 
 video_tau
    KNL Tutorial  ROOM ACB 1.104  Lars Koesterke, Todd Evans, Kent Milfeld  
 1:00  2:30 KNL Tutorial    [Kicking the tires-- Hardware Experiences]   15 min Lect,  35min Lab LECTURE 1: Overview of the Stampede2 KNL system and programming environment.
Lab1: Login on to a Stampede2 KNL compute node interactively (compile & OpenMP/MPI/hybrid execution). Hardware Experiences: run some basic benchmarks|utilities that illustrate the  numa node configurations, DDR and MCDRAM speeds, and cluster modes. (Download your own code, compile and run -- compare to your own system)
 
   [Hybrid Computing on the KNL] 20 min Lect, 20 min Lab
LECTURE2: How to merge MPI and OpenMP methods. 
LAB2: Setting up hybrid runs; exploring mpi-task/OMP-thread ratios and other concerns. Hybrid computing in cluster modes such as SNC-4.
 
 2:30  2:45 Break    
 2:45  4:45 KNL Tutorial (cont.)    [Many-core Affinity] 30min Lect, 30 min Lab
LECTURE3: Learn the basics about the kernel (affinity) map, and how to control affinity (the map) through environment variables.
LAB3: Evaluate and explore simple and explicit settings with the AMASK tool.
 
   [Tools-- VTune] 30min Lecture, 30 min Lab
LECTURE4: KNL-centric hands-on experience with VTune. 
LAB4: A few examples
 
 
 
Important Dates:
Abstract Submission Deadline  Aug 6 -> Aug 13  2017
Abstracts Reviewed by IXPUG Committee  Aug 16-22  2017
Acceptance Notification  Aug 15 ->Aug 23  2017
Preliminary Agenda Posted to IXPUG Website  August 25  2017
Registration Deadline  extended  Sept 25  2017
Agenda Finalized. -- Registration Deadline --  September 15  2017
Final Presentations Due from Speakers  September 19  2017
IXPUG Sessions  September 26-28  2017

 

Call for Presentations:
IXPUG welcomes submissions on innovative work from KNL users in academia, industry and government labs, describing original discoveries and experiences that will promote and prescribe efficient use of manycore and multicore systems. The authors of the best scored abstracts and draft presentations will be selected for a full 30 minute presentation; others may be offered an opportunity to present shorter Lightning Talks.

 

Submission Guidelines:
A short Extended Abstract and Draft Presentation should be submitted by Sunday, August 6th  13th. The suggested organization of the extended abstract is: short abstract summarizing the work, benefits and accomplishments; an introduction with an objective; accomplishments (analysis, optimization, algorithm/software design, tool design, experience, new concepts, etc.) with results; and a summary. An abstract submission must be a PDF file, in a convenient text format; two or three pages should be sufficient. The Draft Presentation does not need to be complete by this date. It should reflect the overall intent of the presentation and contain placeholders for the remaining content to be completed by the Final Presentation.  Presentations describing application results and work on KNL-specific features (e.g. use of MCDRAM, multi-node messaging (MPI) performance and configurations, and new performance tools exploitation) will be prioritized.

For presentation format, please use the IXPUG presentation template; submit Abstract (pdf) and Presentation (pptx or pdf) through EasyChair. (Please indicate Lightning Talk at the top of your abstract if you only intend to submit a short presentation.)

 

Topics of interest are (but not limited to):

  • VectorizationSIMD operations and directives, data layout
  • MemoryDDR/MCDRAM partitioning, memory affinity,  prefetching, latency, streams, etc.
  • CommunicationMPI inter-/intra-node performance, scaling and tuning for Omni-Path/IB
  • IO:Local disk vs global (Lustre, etc.)
  • Thread and Process ManagementAffinity, resource sharing in SMTs (simultaneous multi-threading) and Tiles
  • System Management: Memory/Cluster Modes, Large Pages,  Node Stats, XPPSL, OpenHPC
  • Hybrid Computing: MPI Process/Thread Partitioning, On-node/Off-node Scaling
  • Programming ModelsOpenMP, TBB, Cilk, hStreams, MPI, --others
  • Algorithms and Methods:Application Scaling and Vectorizable Algorithms
  • Tools: Benchmarking, Profiling, Performance Analysis, Affinity
  • Visualization: Software Performance, Algorithms, Methods
  • Deep Learning:Application to speech, image, bioinformatics, natural language, ...

 

Travel and Hotel Information:

  • Transportation, Parking, etc.: Information on how to get to the venue can be found here.

  • Lodging Special conference rates will be available at the Hyatt House hotel (shuttles available).  Use this site for finding other accommodations.
Hotel Hotel Address/Phone Conference Rate Cut-off Date

 

Hyatt House Arboretum

10001 N Capital of TX Hwy

Phone: 512 342-8080

$119

August 26,2017

 

IXPUG2017 Program Committee:

 Kent Milfeld (co-Chair) Texas Advanced Computing Center (TACC)
 Richard Gerber NERSC/Lawrence Berkeley National Laboratory
 Gilles Civario Dell Inc. (DELL)
 Douglas Doerfler NERSC/Lawrence Berkeley National Laboratory
 Helen He NERSC/Lawrence Berkeley National Laboratory
 Clayton Hughes Sandia National Laboratories
 Juha Jaykka University of Cambridge
 Michael Klemm Intel Corporation
 Lars Koesterke (co-Chair) Texas Advanced Computing Center (TACC)
 David Martin Argonne National Laboratory
 Hai Ah Nam Los Alamos National Laboratory
 John Pennycook Intel Corporation
 Thomas Steinke Zuse Institute Berlin
 Estela Suarez Forschungszentrum Juelich
 Sameer Shende ParaTools, Inc.,/University of Oregon
 Jerome Vienne Texas Advanced Computing Center (TACC)